lkml.org 
[lkml]   [2020]   [Jan]   [24]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
    Patch in this message
    /
    From
    Subject[PATCH 4.19 300/639] clk: qcom: Skip halt checks on gcc_pcie_0_pipe_clk for 8998
    Date
    From: Marc Gonzalez <marc.w.gonzalez@free.fr>

    [ Upstream commit c0ee0e43c049a13d11e913edf875e4ee376dc84b ]

    See similar issue solved by commit 5f2420ed2189
    ("clk: qcom: Skip halt checks on gcc_usb3_phy_pipe_clk for 8998")

    Without this patch, PCIe PHY init fails:

    qcom-qmp-phy 1c06000.phy: pipe_clk enable failed err=-16
    phy phy-1c06000.phy.0: phy init failed --> -16

    Signed-off-by: Marc Gonzalez <marc.w.gonzalez@free.fr>
    Reviewed-by: Jeffrey Hugo <jhugo@codeaurora.org>
    Fixes: b5f5f525c547 ("clk: qcom: Add MSM8998 Global Clock Control (GCC) driver")
    Signed-off-by: Stephen Boyd <sboyd@kernel.org>
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    drivers/clk/qcom/gcc-msm8998.c | 2 +-
    1 file changed, 1 insertion(+), 1 deletion(-)

    diff --git a/drivers/clk/qcom/gcc-msm8998.c b/drivers/clk/qcom/gcc-msm8998.c
    index 4e23973b6cd16..772a08101ddf2 100644
    --- a/drivers/clk/qcom/gcc-msm8998.c
    +++ b/drivers/clk/qcom/gcc-msm8998.c
    @@ -2144,7 +2144,7 @@ static struct clk_branch gcc_pcie_0_mstr_axi_clk = {

    static struct clk_branch gcc_pcie_0_pipe_clk = {
    .halt_reg = 0x6b018,
    - .halt_check = BRANCH_HALT,
    + .halt_check = BRANCH_HALT_SKIP,
    .clkr = {
    .enable_reg = 0x6b018,
    .enable_mask = BIT(0),
    --
    2.20.1


    \
     
     \ /
      Last update: 2020-01-24 12:17    [W:4.113 / U:0.008 seconds]
    ©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site