Messages in this thread | | | Subject | Re: [PATCH v3 6/6] clk: zynqmp: Add support for clock with CLK_DIVIDER_POWER_OF_TWO flag | From | Stephen Boyd <> | Date | Thu, 23 Jan 2020 14:59:05 -0800 |
| |
Quoting Rajan Vaja (2019-12-04 22:35:59) > From: Tejas Patel <tejas.patel@xilinx.com> > > Existing clock divider functions is not checking for > base of divider. So, if any clock divider is power of 2 > then clock rate calculation will be wrong. > > Add support to calculate divider value for the clocks > with CLK_DIVIDER_POWER_OF_TWO flag. > > Signed-off-by: Tejas Patel <tejas.patel@xilinx.com> > Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com> > Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> > ---
Applied to clk-next
| |