Messages in this thread | | | Date | Mon, 13 Jan 2020 22:58:03 +0800 | From | Leo Yan <> | Subject | Re: [PATCH] perf tools: Fix bug when recording SPE and non SPE events |
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On Mon, Jan 13, 2020 at 10:17:51PM +0800, Leo Yan wrote:
[...]
> > > On Fri, Dec 20, 2019 at 11:05:25AM +0000, James Clark wrote: > > > > This patch fixes an issue when non Arm SPE events are specified after an > > > > Arm SPE event. In that case, perf will exit with an error code and not > > > > produce a record file. This is because a loop index is used to store the > > > > location of the relevant Arm SPE PMU, but if non SPE PMUs follow, that > > > > index will be overwritten. Fix this issue by saving the PMU into a > > > > variable instead of using the index, and also add an error message. > > > > > > > > Before the fix: > > > > ./perf record -e arm_spe/ts_enable=1/ -e branch-misses ls; echo $? > > > > 237 > > > > > > > > After the fix: > > > > ./perf record -e arm_spe/ts_enable=1/ -e branch-misses ls; echo $? > > > > ... > > > > 0 > > > > > > Just bring up a question related with PMU event registration. Let's > > > see the DT binding in arch/arm64/boot/dts/arm/fvp-base-revc.dts: > > > > > > spe-pmu { > > > compatible = "arm,statistical-profiling-extension-v1"; > > > interrupts = <GIC_PPI 5 IRQ_TYPE_LEVEL_HIGH>; > > > }; > > > > > > > > > Now SPE registers PMU event for every CPU; seem to me, though SPE is an > > > > Do you mean "SPE PMU" here ? SPE is different from ETM, where the trace > > data is micro-architecture dependent. And thus you cannot mix the trace > > on different CPUs with different micro-archs. > > Understood that SPE is micro-architecture dependent.
Maybe SPE is more general than we think :)
Since SPE is defined in ARMv8 architecture reference manual (ARM DDI 0487D.a); should SPE trace data format is unified and defined in Chapter D9 "Statistical Profiling Extension Sample Record Specification"?
Thanks, Leo
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