Messages in this thread | | | Subject | Re: [PATCH RFC 12/14] arm64: dts: qcom: add PDC interrupt controller for SDM845 | From | Maulik Shah <> | Date | Mon, 9 Sep 2019 16:56:19 +0530 |
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On 8/29/2019 11:42 PM, Lina Iyer wrote: > Add PDC interrupt controller device bindings for SDM845. > > Signed-off-by: Lina Iyer <ilina@codeaurora.org> > --- > arch/arm64/boot/dts/qcom/sdm845.dtsi | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi > index be0022e09465..ffe28b3e41d8 100644 > --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi > +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi > @@ -2375,6 +2375,16 @@ > #power-domain-cells = <1>; > }; > > + pdc_intc: interrupt-controller@b220000 { > + compatible = "qcom,sdm845-pdc"; > + reg = <0 0x0b220000 0 0x30000>, <0x179900f0 0x60>;
second register also needs to be in below format
<0 0x179900f0 0 0x60>
> + qcom,pdc-ranges = <0 480 94>, <94 609 15>, <115 630 7>; > + #interrupt-cells = <2>; > + interrupt-parent = <&intc>; > + interrupt-controller; > + qcom,scm-spi-cfg; > + }; > + > pdc_reset: reset-controller@b2e0000 { > compatible = "qcom,sdm845-pdc-global"; > reg = <0 0x0b2e0000 0 0x20000>;
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