Messages in this thread | | | Date | Sat, 7 Sep 2019 06:40:17 +0200 | From | Christoph Hellwig <> | Subject | Re: [PATCH] riscv: move sifive_l2_cache.c to drivers/soc |
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On Fri, Sep 06, 2019 at 03:36:09PM -0700, Paul Walmsley wrote: > One other comment on this patch: > > On Fri, 6 Sep 2019, Paul Walmsley wrote: > > > On Sun, 18 Aug 2019, Christoph Hellwig wrote: > > > > > diff --git a/drivers/edac/Kconfig b/drivers/edac/Kconfig > > > index 200c04ce5b0e..9241b3e7a050 100644 > > > --- a/drivers/edac/Kconfig > > > +++ b/drivers/edac/Kconfig > > > @@ -462,7 +462,7 @@ config EDAC_ALTERA_SDMMC > > > > > > config EDAC_SIFIVE > > > bool "Sifive platform EDAC driver" > > > - depends on EDAC=y && RISCV > > > + depends on EDAC=y && SIFIVE_L2 > > Since the guidance from the EDAC maintainers is that this driver is to be > a platform driver -- which would, for example, also include EDAC support for > other IP blocks (e.g., DRAM controllers) on SiFive SoCs -- this should > depend on SOC_SIFIVE, not SIFIVE_L2.
But as-is without major changes it depends on SIFIVE_L2. And given that it supports nothing else as-is there is no point in making the code conditional either.
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