lkml.org 
[lkml]   [2019]   [Sep]   [7]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
SubjectRe: [RFC v2 1/3] cpufreq: ti-cpufreq: add support for omap34xx and omap36xx
From
Date

> Am 06.09.2019 um 22:46 schrieb H. Nikolaus Schaller <hns@goldelico.com>:
>
> Hi,
>
>> Am 06.09.2019 um 05:01 schrieb Viresh Kumar <viresh.kumar@linaro.org>:
>>
>> On 05-09-19, 07:32, Tony Lindgren wrote:
>>> * H. Nikolaus Schaller <hns@goldelico.com> [190904 08:54]:
>>>> This adds code and tables to read the silicon revision and
>>>> eFuse (speed binned / 720 MHz grade) bits for selecting
>>>> opp-v2 table entries.
>>>>
>>>> Since these bits are not always part of the syscon register
>>>> range (like for am33xx, am43, dra7), we add code to directly
>>>> read the register values using ioremap() if syscon access fails.
>>>
>>> This is nice :) Seems to work for me based on a quick test
>>> on at least omap36xx.
>>>
>>> Looks like n900 produces the following though:
>>>
>>> core: _opp_supported_by_regulators: OPP minuV: 1270000 maxuV: 1270000, not supported by regulator
>>> cpu cpu0: _opp_add: OPP not supported by regulators (550000000)
>>
>> That's a DT thing I believe where the voltage doesn't fit what the
>> regulator can support.
>
> I can confirm this on BeagleBoard C2:
>
> root@gta04:~# dmesg|fgrep -i opp
> [ 2.347442] core: _opp_supported_by_regulators: OPP minuV: 1270000 maxuV: 1270000, not supported by regulator
> [ 2.359222] cpu cpu0: _opp_add: OPP not supported by regulators (550000000)
> [ 2.580993] omap2_set_init_voltage: unable to find boot up OPP for vdd_core
> root@gta04:~#
>
>>
>>> But presumably that can be further patched.
>
> Well, the opp-v1 table also has this voltage point:
>
> /* OMAP343x/OMAP35xx variants OPP1-5 */
> operating-points = <
> /* kHz uV */
> 125000 975000
> 250000 1075000
> 500000 1200000
> 550000 1270000
> 600000 1350000
> >;
>
>
> This is OPP4 which is recommended by OMAP3530 data sheet to be 1.27V +/- 5%
>
> Data sheet of tps65950 says
>
> • VDD1: 1.2-A, buck DC/DC converter (VOUT = 0.6 V to 1.45 V, in steps of 12.5 mV)
>
> This means 1270 mV is not a "step" and rejected by the twl4030 driver.
> Maybe nobody did notice yet because the opp-v1 drivers did not warn...
>
> The closest value to 1.27V is 0.6V + 54 * 12.5mV is 1.275V
>
> So let's also change the OPP4 to 1275000 uV in the opp-v2 table.

The OPP is now available. Only

[ 2.569519] omap2_set_init_voltage: unable to find boot up OPP for vdd_core

remains but this is a different issue (mismatch between U-Boot clock/vdd_core
setup and kernel table). Most likely U-Boot runs with an 300MHz OPP which is
not defined by data sheet or kernel opp tables.

BR,
Nikolaus
\
 
 \ /
  Last update: 2019-09-07 08:35    [W:0.059 / U:0.180 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site