lkml.org 
[lkml]   [2019]   [Sep]   [3]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
    Patch in this message
    /
    From
    Subject[PATCH AUTOSEL 4.19 010/167] drm/amdgpu: Update gc_9_0 golden settings.
    Date
    From: Feifei Xu <Feifei.Xu@amd.com>

    [ Upstream commit c55045adf7210d246a016c961916f078ed31a951 ]

    Add mmDB_DEBUG3 settings.

    Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
    Reviewed-by: Evan Quan <evan.quan@amd.com>
    Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
    Cc: stable@vger.kernel.org
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 1 +
    1 file changed, 1 insertion(+)

    diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
    index f040ec10eecf6..7824116498169 100644
    --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
    +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
    @@ -83,6 +83,7 @@ MODULE_FIRMWARE("amdgpu/raven_rlc.bin");
    static const struct soc15_reg_golden golden_settings_gc_9_0[] =
    {
    SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG2, 0xf00fffff, 0x00000400),
    + SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG3, 0x80000000, 0x80000000),
    SOC15_REG_GOLDEN_VALUE(GC, 0, mmGB_GPU_ID, 0x0000000f, 0x00000000),
    SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_BINNER_EVENT_CNTL_3, 0x00000003, 0x82400024),
    SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_ENHANCE, 0x3fffffff, 0x00000001),
    --
    2.20.1
    \
     
     \ /
      Last update: 2019-09-03 18:39    [W:4.019 / U:0.564 seconds]
    ©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site