Messages in this thread | | | Date | Thu, 19 Sep 2019 03:24:55 +0000 | From | Xiang Wang <> | Subject | Re: arch/riscv: disable too many harts before pick main boot hart |
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‐‐‐‐‐‐‐ Original Message ‐‐‐‐‐‐‐ On 2019年9月14日SaturdayAM3点04分, Palmer Dabbelt <palmer@sifive.com> wrote:
> On Thu, 05 Sep 2019 23:51:15 PDT (-0700), merle@hardenedlinux.org wrote: > > > From 12300865d1103618c9d4c375f7d7fbe601b6618c Mon Sep 17 00:00:00 2001 > > From: Xiang Wang merle@hardenedlinux.org > > Date: Fri, 6 Sep 2019 11:56:09 +0800 > > Subject: [PATCH] arch/riscv: disable too many harts before pick main boot hart > > These harts with id greater than or equal to CONFIG_NR_CPUS need to be disabled. > > But pick the main Hart can choose any one. So, before pick the main hart, you > > need to disable the hart with id greater than or equal to CONFIG_NR_CPUS. > > > > Signed-off-by: Xiang Wang merle@hardenedlinux.org > > > > -------------------------------------------------- > > > > arch/riscv/kernel/head.S | 8 +++++--- > > 1 file changed, 5 insertions(+), 3 deletions(-) > > diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S > > index 0f1ba17e476f..cfffea38eb17 100644 > > --- a/arch/riscv/kernel/head.S > > +++ b/arch/riscv/kernel/head.S > > @@ -63,6 +63,11 @@ _start_kernel: > > li t0, SR_FS > > csrc sstatus, t0 > > +#ifdef CONFIG_SMP > > > > - li t0, CONFIG_NR_CPUS > > - bgeu a0, t0, .Lsecondary_park > > +#endif > > > > - > > > > /* Pick one hart to run the main boot sequence */ > > la a3, hart_lottery > > li a2, 1 > > @@ -154,9 +159,6 @@ relocate: > > .Lsecondary_start: > > #ifdef CONFIG_SMP > > > > - li a1, CONFIG_NR_CPUS > > - bgeu a0, a1, .Lsecondary_park > > - > > > > /* Set trap vector to spin forever to help debug */ > > la a3, .Lsecondary_park > > csrw CSR_STVEC, a3 > > It would be better to decouple the hart masks from NR_CPUS, as there's really > no reason for these to be the same.
This may be new feature. Need to define new macros such as disabled_hart_mask, this patch is used to fix bug and not add new feature.
> > Reviewed-by: Palmer Dabbelt palmer@sifive.com
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