Messages in this thread | | | Date | Thu, 12 Sep 2019 00:37:54 +0200 (CEST) | Subject | Re: [PATCH v4 2/2] net: phy: dp83867: Add SGMII mode type switching | From | David Miller <> |
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From: Vitaly Gaiduk <vitaly.gaiduk@cloudbear.ru> Date: Mon, 9 Sep 2019 20:19:24 +0300
> This patch adds ability to switch beetween two PHY SGMII modes. > Some hardware, for example, FPGA IP designs may use 6-wire mode > which enables differential SGMII clock to MAC. > > Signed-off-by: Vitaly Gaiduk <vitaly.gaiduk@cloudbear.ru>
Applied.
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