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SubjectRe: [PATCH 1/5] sched/pci: Reduce psimon FIFO priority
On Thu, Aug 1, 2019 at 11:31 AM Suren Baghdasaryan <surenb@google.com> wrote:
>
> On Thu, Aug 1, 2019 at 10:49 AM Johannes Weiner <hannes@cmpxchg.org> wrote:
> >
> > On Thu, Aug 01, 2019 at 01:13:49PM +0200, Peter Zijlstra wrote:
> > > PSI defaults to a FIFO-99 thread, reduce this to FIFO-1.

nit: above "PSI defaults" is more accurately "PSI polling defaults".
The core PSI thread that handles regular updates is a regular kthread.

> > >
> > > FIFO-99 is the very highest priority available to SCHED_FIFO and
> > > it not a suitable default; it would indicate the psi work is the
> > > most important work on the machine.
> > >
> > > Since Real-Time tasks will have pre-allocated memory and locked it in
> > > place, Real-Time tasks do not care about PSI. All it needs is to be
> > > above OTHER.
> > >
> > > Cc: Suren Baghdasaryan <surenb@google.com>
> > > Cc: Johannes Weiner <hannes@cmpxchg.org>
> > > Cc: Thomas Gleixner <tglx@linutronix.de>
> > > Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
> >
> > Acked-by: Johannes Weiner <hannes@cmpxchg.org>
> >
> > Subject should be s/pci/psi/
>
> Thanks for the patch. Please give me a couple hours for testing to
> ensure no regressions before merging it.

Tested-by: Suren Baghdasaryan <surenb@google.com>

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