Messages in this thread Patch in this message | | | Date | Tue, 9 Jul 2019 17:31:07 -0700 | From | Kees Cook <> | Subject | Re: [GIT PULL] x86/topology changes for v5.3 |
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On Wed, Jul 10, 2019 at 01:17:11AM +0200, Thomas Gleixner wrote: > On Wed, 10 Jul 2019, Thomas Gleixner wrote: > > > > That still does not explain the cr4/0 issue you have. Can you send me your > > .config please? > > Does your machine have UMIP support? None of my test boxes has. So that'd > be the difference of bits enforced in CR4. Should not matter because it's > User mode instruction prevention, but who knows.
Ew. Yeah, I don't have i9 nor i7 for testing this. I did try everything else I had (and hibernation). Is only Linus able to reproduce this so far?
To rule out (in?) UMIP, this would remove UMIP from the pinning:
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index 309b6b9b49d4..f3beedb6da8a 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -380,7 +380,7 @@ static void __init setup_cr_pinning(void) { unsigned long mask; - mask = (X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_UMIP); + mask = (X86_CR4_SMEP | X86_CR4_SMAP); cr4_pinned_bits = this_cpu_read(cpu_tlbstate.cr4) & mask; static_key_enable(&cr_pinning.key); }
-- Kees Cook
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