Messages in this thread | | | Subject | Re: [PATCH 3/9] dt-bindings: interrupt-controller: arm, gic-v3: Describe ESPI range support | From | Lokesh Vutla <> | Date | Tue, 23 Jul 2019 18:29:29 +0530 |
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On 23/07/19 4:14 PM, Marc Zyngier wrote: > GICv3.1 introduces support for new interrupt ranges, one of them being > the Extended SPI range (ESPI). The DT binding is extended to deal with > it as a new interrupt class. > > Signed-off-by: Marc Zyngier <maz@kernel.org> > --- > .../devicetree/bindings/interrupt-controller/arm,gic-v3.yaml | 5 +++-- > 1 file changed, 3 insertions(+), 2 deletions(-) > > diff --git a/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml b/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml > index c34df35a25fc..98a3ecda8e07 100644 > --- a/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml > +++ b/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml > @@ -44,11 +44,12 @@ properties: > be at least 4. > > The 1st cell is the interrupt type; 0 for SPI interrupts, 1 for PPI > - interrupts. Other values are reserved for future use. > + interrupts, 2 for interrupts in the Extended SPI range. Other values > + are reserved for future use.
Any reason why hardware did not consider extending SPIs from 1020:2043? This way only EPPI would have been introduced. Just a thought.
Either ways, just to be consistent with hardware numbering can ESPI range be 3 and EPPI range be 2?
Thanks and regards, Lokesh
> > The 2nd cell contains the interrupt number for the interrupt type. > SPI interrupts are in the range [0-987]. PPI interrupts are in the > - range [0-15]. > + range [0-15]. Extented SPI interrupts are in the range [0-1023]. > > The 3rd cell is the flags, encoded as follows: > bits[3:0] trigger type and level flags. >
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