Messages in this thread Patch in this message | | | From | Srinivas Kandagatla <> | Subject | [PATCH 2/6] nvmem: imx-ocotp: Ensure WAIT bits are preserved when setting timing | Date | Wed, 26 Jun 2019 11:27:29 +0100 |
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From: Bryan O'Donoghue <pure.logic@nexus-software.ie>
The i.MX6 and i.MX8 both have a bit-field spanning bits 27:22 called the WAIT field.
The WAIT field according to the documentation for both parts "specifies time interval between auto read and write access in one time program. It is given in number of ipg_clk periods."
This patch ensures that the relevant field is read and written back to the timing register.
Fixes: 0642bac7da42 ("nvmem: imx-ocotp: add write support")
Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie> Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> --- drivers/nvmem/imx-ocotp.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/nvmem/imx-ocotp.c b/drivers/nvmem/imx-ocotp.c index 14c2bff2cd96..f4e117bbf2c3 100644 --- a/drivers/nvmem/imx-ocotp.c +++ b/drivers/nvmem/imx-ocotp.c @@ -183,7 +183,8 @@ static void imx_ocotp_set_imx6_timing(struct ocotp_priv *priv) strobe_prog = clk_rate / (1000000000 / 10000) + 2 * (DEF_RELAX + 1) - 1; strobe_read = clk_rate / (1000000000 / 40) + 2 * (DEF_RELAX + 1) - 1; - timing = strobe_prog & 0x00000FFF; + timing = readl(priv->base + IMX_OCOTP_ADDR_TIMING) & 0x0FC00000; + timing |= strobe_prog & 0x00000FFF; timing |= (relax << 12) & 0x0000F000; timing |= (strobe_read << 16) & 0x003F0000; -- 2.21.0
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