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SubjectRe: [PATCH v9 17/17] x86/split_lock: Warn on unaligned address in atomic bit operations
On Tue, 18 Jun 2019, Fenghua Yu wrote:

> An atomic bit operation operates one bit in a single unsigned long location
> in a bitmap. In 64-bit mode, the location is at:
> base address of the bitmap + (bit offset in the bitmap / 64) * 8
>
> If the base address is unaligned to unsigned long, each unsigned long
> location operated by the atomic operation will be unaligned to unsigned
> long and a split lock issue will happen if the unsigned long location
> crosses two cache lines.

Stop harping on this split lock stuff.

Unalignedness is a problem per se as myself and others explained you a
gazillion times now.

The fact that it does not matter on x86 except when it crosses a cacheline
does not make it in any way a split lock issue.

The root cause is misalignment per se.

Aside of that this debug enhancement wants to be the first patch in the
series not the last.

Thanks,

tglx




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