lkml.org 
[lkml]   [2019]   [Jun]   [25]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
SubjectRe: [v3 1/2] mtd: nand: Add Cadence NAND controller driver
From
Date
25.06.2019 16:02, Piotr Sroka пишет:
> Hi Dmitry
>
> The 06/16/2019 16:42, Dmitry Osipenko wrote:
>> EXTERNAL MAIL
>>
>>
>> 14.06.2019 18:09, Piotr Sroka пишет:
>>
>> Commit description is mandatory.
>>
>>> Signed-off-by: Piotr Sroka <piotrs@cadence.com>
>>> ---
>>
>> [snip]
>>
>>> +
>>> +/* Cadnence NAND flash controller capabilities get from driver data. */
>>> +struct cadence_nand_dt_devdata {
>>> +    /* Skew value of the output signals of the NAND Flash interface. */
>>> +    u32 if_skew;
>>> +    /* It informs if aging feature in the DLL PHY supported. */
>>> +    u8 phy_dll_aging;
>>> +    /*
>>> +     * It informs if per bit deskew for read and write path in
>>> +     * the PHY is supported.
>>> +     */
>>> +    u8 phy_per_bit_deskew;
>>> +    /* It informs if slave DMA interface is connected to DMA engine. */
>>> +    u8 has_dma;
>>
>> There is no needed to dedicate 8 bits to a variable if you only care about a single
>> bit. You may write this as:
>>
>> bool has_dma : 1;
> I modified it locally but it looks that checkpatch does not like such
> notation
> "WARNING: Avoid using bool as bitfield.  Prefer bool bitfields as
> unsigned int or u<8|16|32>"
> So maybe I will leave it as is.

You may also use the "u8 : 1" form then, to satisfy the checkpatch. Probably
"unsigned int : 1" will be the best in this case, it's up to you.

\
 
 \ /
  Last update: 2019-06-25 16:46    [W:0.072 / U:1.188 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site