Messages in this thread Patch in this message | | | From | "Z.q. Hou" <> | Subject | [PATCHv7 4/7] PCI: mobiveil: Add 8-bit and 16-bit CSR register accessors | Date | Tue, 25 Jun 2019 09:09:28 +0000 |
| |
From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
There are some 8-bit and 16-bit registers in PCIe configuration space, so add these accessors accordingly.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Minghuan Lian <Minghuan.Lian@nxp.com> Reviewed-by: Subrahmanya Lingappa <l.subrahmanya@mobiveil.co.in> --- V7: - New patch moved from the fixes series.
.../pci/controller/mobiveil/pcie-mobiveil.h | 20 +++++++++++++++++++ 1 file changed, 20 insertions(+)
diff --git a/drivers/pci/controller/mobiveil/pcie-mobiveil.h b/drivers/pci/controller/mobiveil/pcie-mobiveil.h index 159b0142a2bc..a729a4f879fe 100644 --- a/drivers/pci/controller/mobiveil/pcie-mobiveil.h +++ b/drivers/pci/controller/mobiveil/pcie-mobiveil.h @@ -185,9 +185,29 @@ static inline u32 csr_readl(struct mobiveil_pcie *pcie, u32 off) return csr_read(pcie, off, 0x4); } +static inline u32 csr_readw(struct mobiveil_pcie *pcie, u32 off) +{ + return csr_read(pcie, off, 0x2); +} + +static inline u32 csr_readb(struct mobiveil_pcie *pcie, u32 off) +{ + return csr_read(pcie, off, 0x1); +} + static inline void csr_writel(struct mobiveil_pcie *pcie, u32 val, u32 off) { csr_write(pcie, val, off, 0x4); } +static inline void csr_writew(struct mobiveil_pcie *pcie, u32 val, u32 off) +{ + csr_write(pcie, val, off, 0x2); +} + +static inline void csr_writeb(struct mobiveil_pcie *pcie, u32 val, u32 off) +{ + csr_write(pcie, val, off, 0x1); +} + #endif /* _PCIE_MOBIVEIL_H */ -- 2.17.1
| |