Messages in this thread | | | Subject | Re: [PATCH 0/9] x86: Concurrent TLB flushes and other improvements | From | Dave Hansen <> | Date | Tue, 25 Jun 2019 15:02:52 -0700 |
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On 6/12/19 11:48 PM, Nadav Amit wrote: > Running sysbench on dax w/emulated-pmem, write-cache disabled, and > various mitigations (PTI, Spectre, MDS) disabled on Haswell: > > sysbench fileio --file-total-size=3G --file-test-mode=rndwr \ > --file-io-mode=mmap --threads=4 --file-fsync-mode=fdatasync run > > events (avg/stddev) > ------------------- > 5.2-rc3: 1247669.0000/16075.39 > +patchset: 1290607.0000/13617.56 (+3.4%)
Why did you decide on disabling the side-channel mitigations? While they make things slower, they're also going to be with us for a while, so they really are part of real-world testing IMNHO. I'd be curious whether this set has more or less of an advantage when all the mitigations are on.
Also, why only 4 threads? Does this set help most when using a moderate number of threads since the local and remote cost are (relatively) close vs. a large system where doing lots of remote flushes is *way* more time-consuming than a local flush?
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