Messages in this thread | | | From | "Bowers, AndrewX" <> | Subject | RE: [Intel-wired-lan] [PATCH][next][V2] ixgbe: fix potential u32 overflow on shift | Date | Wed, 19 Jun 2019 23:13:15 +0000 |
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> -----Original Message----- > From: Intel-wired-lan [mailto:intel-wired-lan-bounces@osuosl.org] On > Behalf Of Colin King > Sent: Friday, June 7, 2019 11:19 AM > To: Keller, Jacob E <jacob.e.keller@intel.com>; Kirsher, Jeffrey T > <jeffrey.t.kirsher@intel.com>; David S . Miller <davem@davemloft.net>; > intel-wired-lan@lists.osuosl.org; netdev@vger.kernel.org > Cc: kernel-janitors@vger.kernel.org; linux-kernel@vger.kernel.org > Subject: [Intel-wired-lan] [PATCH][next][V2] ixgbe: fix potential u32 > overflow on shift > > From: Colin Ian King <colin.king@canonical.com> > > The u32 variable rem is being shifted using u32 arithmetic however it is being > passed to div_u64 that expects the expression to be a u64. > The 32 bit shift may potentially overflow, so cast rem to a u64 before shifting > to avoid this. Also remove comment about overflow. > > Addresses-Coverity: ("Unintentional integer overflow") > Fixes: cd4583206990 ("ixgbe: implement support for SDP/PPS output on X550 > hardware") > Fixes: 68d9676fc04e ("ixgbe: fix PTP SDP pin setup on X540 hardware") > Signed-off-by: Colin Ian King <colin.king@canonical.com> > --- > > V2: update comment > > --- > drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c | 14 ++++---------- > 1 file changed, 4 insertions(+), 10 deletions(-)
Tested-by: Andrew Bowers <andrewx.bowers@intel.com>
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