Messages in this thread | | | Subject | Re: [RFC] perf/x86/intel: Disable check_msr for real hw | From | "Liang, Kan" <> | Date | Fri, 14 Jun 2019 09:45:21 -0400 |
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On 6/14/2019 7:28 AM, Jiri Olsa wrote: > hi, > the HPE server can do POST tracing and have enabled LBR > tracing during the boot, which makes check_msr fail falsly. > > It looks like check_msr code was added only to check on guests > MSR access, would it be then ok to disable check_msr for real > hardware? (as in patch below)
Yes, the check_msr patch was to fix a bug report in guest. I didn't get similar bug report for real hardware. I think it should be OK to disable it for real hardware.
Thanks, Kan
> > We could also check if LBR tracing is enabled and make > appropriate checks, but this change is simpler ;-) > > ideas? thanks, > jirka > > > --- > arch/x86/events/intel/core.c | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c > index 71001f005bfe..1194ae7e1992 100644 > --- a/arch/x86/events/intel/core.c > +++ b/arch/x86/events/intel/core.c > @@ -20,6 +20,7 @@ > #include <asm/intel-family.h> > #include <asm/apic.h> > #include <asm/cpu_device_id.h> > +#include <asm/hypervisor.h> > > #include "../perf_event.h" > > @@ -4050,6 +4051,13 @@ static bool check_msr(unsigned long msr, u64 mask) > { > u64 val_old, val_new, val_tmp; > > + /* > + * Disable the check for real HW, so we don't > + * mess up with potentionaly enabled regs. > + */ > + if (hypervisor_is_type(X86_HYPER_NATIVE)) > + return true; > + > /* > * Read the current value, change it and read it back to see if it > * matches, this is needed to detect certain hardware emulators >
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