Messages in this thread | | | Date | Tue, 11 Jun 2019 18:41:26 +0800 | From | tengfeif@codeauro ... | Subject | Re: [PATCH] pinctrl: qcom: Clear status bit on irq_unmask |
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On 2019-06-10 22:51, Stephen Boyd wrote: > Quoting Linus Walleij (2019-06-07 14:08:10) >> On Fri, May 31, 2019 at 8:52 AM Tengfei Fan <tengfeif@codeaurora.org> >> wrote: >> >> > The gpio interrupt status bit is getting set after the >> > irq is disabled and causing an immediate interrupt after >> > enablling the irq, so clear status bit on irq_unmask. >> > >> > Signed-off-by: Tengfei Fan <tengfeif@codeaurora.org> >> >> This looks pretty serious, can one of the Qcom maintainers ACK >> this? >> >> Should it be sent to fixes and even stable? >> >> Fixes: tag? >> > > How is the interrupt status bit getting set after the irq is disabled? > It looks like this is a level type interrupt? I thought that after > commit b55326dc969e ("pinctrl: msm: Really mask level interrupts to > prevent latching") this wouldn't be a problem. Am I wrong, or is qcom > just clearing out patches on drivers and this is the last one that > needs > to be upstreamed?
Your patch(commit b55326dc969e) can cover our issue, and my patch is no longer needed. Your patch isn't included in our code, so I submitted this patch.
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