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    Subject[PATCH v7 09/18] x86/entry/64: Add the READ_MSR_GSBASE macro
    Date
    Factor out the RDMSR-based GSBASE read into a new macro.

    Signed-off-by: Chang S. Bae <chang.seok.bae@intel.com>
    Cc: Thomas Gleixner <tglx@linutronix.de>
    Cc: Ingo Molnar <mingo@kernel.org>
    Cc: Andy Lutomirski <luto@kernel.org>
    Cc: H. Peter Anvin <hpa@zytor.com>
    Cc: Andi Kleen <ak@linux.intel.com>
    Cc: Dave Hansen <dave.hansen@linux.intel.com>
    ---
    arch/x86/entry/calling.h | 9 +++++++++
    arch/x86/entry/entry_64.S | 12 ++++++++----
    2 files changed, 17 insertions(+), 4 deletions(-)

    diff --git a/arch/x86/entry/calling.h b/arch/x86/entry/calling.h
    index efb0d1b..d119729 100644
    --- a/arch/x86/entry/calling.h
    +++ b/arch/x86/entry/calling.h
    @@ -337,6 +337,15 @@ For 32-bit we have the following conventions - kernel is built with
    #endif
    .endm

    +.macro READ_MSR_GSBASE save_reg:req
    + movl $MSR_GS_BASE, %ecx
    + /* Read MSR specified by %ecx into %edx:%eax */
    + rdmsr
    + .ifnc \save_reg, %edx
    + movl %edx, \save_reg
    + .endif
    +.endm
    +
    #endif /* CONFIG_X86_64 */

    .macro STACKLEAK_ERASE
    diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S
    index 20e45d9..568a491 100644
    --- a/arch/x86/entry/entry_64.S
    +++ b/arch/x86/entry/entry_64.S
    @@ -1159,11 +1159,15 @@ ENTRY(paranoid_entry)
    cld
    PUSH_AND_CLEAR_REGS save_ret=1
    ENCODE_FRAME_POINTER 8
    +
    movl $1, %ebx
    - movl $MSR_GS_BASE, %ecx
    - rdmsr
    - testl %edx, %edx
    - js 1f /* negative -> in kernel */
    + /*
    + * The kernel-enforced convention is a negative GSBASE indicates
    + * a kernel value.
    + */
    + READ_MSR_GSBASE save_reg=%edx
    + testl %edx, %edx /* Negative -> in kernel */
    + js 1f
    SWAPGS
    xorl %ebx, %ebx

    --
    2.7.4
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