Messages in this thread | | | From | Martin Blumenstingl <> | Date | Mon, 27 May 2019 19:46:43 +0200 | Subject | Re: [PATCH 04/14] pwm: meson: change MISC_CLK_SEL_WIDTH to MISC_CLK_SEL_MASK |
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Hi Neil,
On Mon, May 27, 2019 at 2:26 PM Neil Armstrong <narmstrong@baylibre.com> wrote: > > On 25/05/2019 20:11, Martin Blumenstingl wrote: > > MISC_CLK_SEL_WIDTH is only used in one place where it's converted into > > a bit-mask. Rename and change the macro to be a bit-mask so that > > conversion is not needed anymore. No functional changes intended. > > > > Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> > > --- > > drivers/pwm/pwm-meson.c | 4 ++-- > > 1 file changed, 2 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/pwm/pwm-meson.c b/drivers/pwm/pwm-meson.c > > index c62a3ac924d0..84b28ba0f903 100644 > > --- a/drivers/pwm/pwm-meson.c > > +++ b/drivers/pwm/pwm-meson.c > > @@ -33,7 +33,7 @@ > > #define MISC_A_CLK_DIV_SHIFT 8 > > #define MISC_B_CLK_SEL_SHIFT 6 > > #define MISC_A_CLK_SEL_SHIFT 4 > > -#define MISC_CLK_SEL_WIDTH 2 > > +#define MISC_CLK_SEL_MASK 0x3 > > NIT I would have used GENMASK here that was my initial idea but I decided against it. the variant I came up with was: #define MISC_CLK_SEL_MASK GENMASK(1, 0)
however, the actual offset is either 4 or 6 (depending on the PWM channel) and I felt that duplicating the macro would just make it more complicated so instead I chose to be consistent with MISC_CLK_DIV_MASK
Let me know if you would like me to change it (then I prefer to update MISC_CLK_DIV_MASK as well).
Martin
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