Messages in this thread | | | Subject | Re: [PATCH 4.19 049/114] iommu/tegra-smmu: Fix invalid ASID bits on Tegra30/114 | From | Dmitry Osipenko <> | Date | Mon, 27 May 2019 20:12:32 +0300 |
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27.05.2019 18:46, Pavel Machek пишет: > On Thu 2019-05-23 21:05:48, Greg Kroah-Hartman wrote: >> From: Dmitry Osipenko <digetx@gmail.com> >> >> commit 43a0541e312f7136e081e6bf58f6c8a2e9672688 upstream. >> >> Both Tegra30 and Tegra114 have 4 ASID's and the corresponding bitfield of >> the TLB_FLUSH register differs from later Tegra generations that have 128 >> ASID's. >> >> In a result the PTE's are now flushed correctly from TLB and this fixes >> problems with graphics (randomly failing tests) on Tegra30. > > > Three copies of same code... maybe its time to introduce helper function? > Feel free to submit a patch if you think that something could be improved. To me it is good as-is.
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