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    Subject[PATCH 12/25] clk: sunxi-ng: a31: Use local parent references for CLK_FIXED_FACTOR
    Date
    From: Chen-Yu Tsai <wens@csie.org>

    With the new clk parenting code and CLK_FIXED_FACTOR_{HW,FW_NAME}
    macros, we can reference parents locally via pointers to struct clk_hw
    or DT clock-names.

    Convert existing CLK_FIXED_FACTOR definitions to either the _HW or
    _FW_NAME variant based on whether the parent clock is internal or
    external to the CCU.

    Signed-off-by: Chen-Yu Tsai <wens@csie.org>
    ---
    drivers/clk/sunxi-ng/ccu-sun6i-a31.c | 39 ++++++++++++++++++----------
    1 file changed, 25 insertions(+), 14 deletions(-)

    diff --git a/drivers/clk/sunxi-ng/ccu-sun6i-a31.c b/drivers/clk/sunxi-ng/ccu-sun6i-a31.c
    index b494c4fe0b2c..048c0d75d0b0 100644
    --- a/drivers/clk/sunxi-ng/ccu-sun6i-a31.c
    +++ b/drivers/clk/sunxi-ng/ccu-sun6i-a31.c
    @@ -963,21 +963,32 @@ static struct ccu_common *sun6i_a31_ccu_clks[] = {
    &out_c_clk.common,
    };

    +static const struct clk_hw *clk_parent_pll_audio[] = {
    + &pll_audio_base_clk.common.hw
    +};
    +
    /* We hardcode the divider to 1 for now */
    -static CLK_FIXED_FACTOR(pll_audio_clk, "pll-audio",
    - "pll-audio-base", 1, 1, CLK_SET_RATE_PARENT);
    -static CLK_FIXED_FACTOR(pll_audio_2x_clk, "pll-audio-2x",
    - "pll-audio-base", 2, 1, CLK_SET_RATE_PARENT);
    -static CLK_FIXED_FACTOR(pll_audio_4x_clk, "pll-audio-4x",
    - "pll-audio-base", 1, 1, CLK_SET_RATE_PARENT);
    -static CLK_FIXED_FACTOR(pll_audio_8x_clk, "pll-audio-8x",
    - "pll-audio-base", 1, 2, CLK_SET_RATE_PARENT);
    -static CLK_FIXED_FACTOR(pll_periph_2x_clk, "pll-periph-2x",
    - "pll-periph", 1, 2, 0);
    -static CLK_FIXED_FACTOR(pll_video0_2x_clk, "pll-video0-2x",
    - "pll-video0", 1, 2, CLK_SET_RATE_PARENT);
    -static CLK_FIXED_FACTOR(pll_video1_2x_clk, "pll-video1-2x",
    - "pll-video1", 1, 2, CLK_SET_RATE_PARENT);
    +static CLK_FIXED_FACTOR_HWS(pll_audio_clk, "pll-audio",
    + clk_parent_pll_audio,
    + 1, 1, CLK_SET_RATE_PARENT);
    +static CLK_FIXED_FACTOR_HWS(pll_audio_2x_clk, "pll-audio-2x",
    + clk_parent_pll_audio,
    + 2, 1, CLK_SET_RATE_PARENT);
    +static CLK_FIXED_FACTOR_HWS(pll_audio_4x_clk, "pll-audio-4x",
    + clk_parent_pll_audio,
    + 1, 1, CLK_SET_RATE_PARENT);
    +static CLK_FIXED_FACTOR_HWS(pll_audio_8x_clk, "pll-audio-8x",
    + clk_parent_pll_audio,
    + 1, 2, CLK_SET_RATE_PARENT);
    +static CLK_FIXED_FACTOR_HW(pll_periph_2x_clk, "pll-periph-2x",
    + &pll_periph_clk.common.hw,
    + 1, 2, 0);
    +static CLK_FIXED_FACTOR_HW(pll_video0_2x_clk, "pll-video0-2x",
    + &pll_video0_clk.common.hw,
    + 1, 2, CLK_SET_RATE_PARENT);
    +static CLK_FIXED_FACTOR_HW(pll_video1_2x_clk, "pll-video1-2x",
    + &pll_video1_clk.common.hw,
    + 1, 2, CLK_SET_RATE_PARENT);

    static struct clk_hw_onecell_data sun6i_a31_hw_clks = {
    .hws = {
    --
    2.20.1
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