Messages in this thread | | | Date | Tue, 9 Apr 2019 09:34:13 -0700 | From | Jacob Pan <> | Subject | Re: [PATCH 09/18] iommu/vt-d: Enlightened PASID allocation |
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On Tue, 9 Apr 2019 13:08:59 +0300 Andriy Shevchenko <andriy.shevchenko@linux.intel.com> wrote:
> On Mon, Apr 08, 2019 at 04:59:24PM -0700, Jacob Pan wrote: > > From: Lu Baolu <baolu.lu@linux.intel.com> > > > > If Intel IOMMU runs in caching mode, a.k.a. virtual IOMMU, the > > IOMMU driver should rely on the emulation software to allocate > > and free PASID IDs. The Intel vt-d spec revision 3.0 defines a > > register set to support this. This includes a capability register, > > a virtual command register and a virtual response register. Refer > > to section 10.4.42, 10.4.43, 10.4.44 for more information. > > > > This patch adds the enlightened PASID allocation/free interfaces > > via the virtual command register. > > > + pr_debug("vcmd alloc pasid\n"); > > Perhaps tracepoints should be in use? > OTOH we have function tracer, so, this message in any case is a noise. > And this is applicable to other similar cases. >
Agreed, I added that for debug purpose.
Thanks,
Jacob
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