Messages in this thread Patch in this message | | | From | Fenghua Yu <> | Subject | [PATCH v6 02/20] drivers/net/b44: Align pwol_mask to unsigned long for better performance | Date | Wed, 3 Apr 2019 14:21:48 -0700 |
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From: Peter Zijlstra <peterz@infradead.org>
A bit in pwol_mask is set in b44_magic_pattern by atomic set_bit. But since pwol_mask is local and never exposed to concurrency, there is no need to set bit in pwol_mask atomically.
set_bit sets the bit in a single unsigned long location. Because pwol_mask may not be aligned to unsigned long, the location may cross two cache lines. On x86, accessing two cache lines in locked instruction in set_bit is called split lock and can cause overall performance degradation.
So use non atomic __set_bit to set pwol_mask bits. __set_bit won't hit split lock issue on x86.
Signed-off-by: Peter Zijlstra <peterz@infradead.org> Signed-off-by: Fenghua Yu <fenghua.yu@intel.com> --- drivers/net/ethernet/broadcom/b44.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/broadcom/b44.c b/drivers/net/ethernet/broadcom/b44.c index 97ab0dd25552..5738ab963dfb 100644 --- a/drivers/net/ethernet/broadcom/b44.c +++ b/drivers/net/ethernet/broadcom/b44.c @@ -1520,7 +1520,7 @@ static int b44_magic_pattern(u8 *macaddr, u8 *ppattern, u8 *pmask, int offset) memset(ppattern + offset, 0xff, magicsync); for (j = 0; j < magicsync; j++) - set_bit(len++, (unsigned long *) pmask); + __set_bit(len++, (unsigned long *)pmask); for (j = 0; j < B44_MAX_PATTERNS; j++) { if ((B44_PATTERN_SIZE - len) >= ETH_ALEN) @@ -1532,7 +1532,7 @@ static int b44_magic_pattern(u8 *macaddr, u8 *ppattern, u8 *pmask, int offset) for (k = 0; k< ethaddr_bytes; k++) { ppattern[offset + magicsync + (j * ETH_ALEN) + k] = macaddr[k]; - set_bit(len++, (unsigned long *) pmask); + __set_bit(len++, (unsigned long *)pmask); } } return len - 1; -- 2.19.1
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