Messages in this thread | | | Date | Wed, 24 Apr 2019 13:57:03 +0800 | From | Guo Ren <> | Subject | Re: [PATCH] riscv: Support non-coherency memory model |
| |
Hi Gary,
On Wed, Apr 24, 2019 at 03:21:14AM +0000, Gary Guo wrote: > > Look: > > linux-next git:(riscv_asid_allocator_v2)$ grep GLOBAL arch/riscv -r > > arch/riscv/include/asm/pgtable-bits.h:#define _PAGE_GLOBAL (1 << 5) /* > > Global */ > > arch/riscv/include/asm/pgtable-bits.h: _PAGE_USER | > > _PAGE_GLOBAL)) > > > > Your patch tell us _PAGE_USER and _PAGE_GLOBAL are duplicate and why we > > couldn't make _PAGE_USER implies _PAGE_GLOBAL? Can you give an example > > of a real scene in PTE about: > > _PAGE_USER:0 + _PAGE_GLOBAL:1 > > or > > _PAGE_USER:1 + _PAGE_GLOBAL:0 > > > > Of cause I know USER & GLOBAL are conceptually very different, but > > there are only 10 attribute-bits for riscv (In fact we've wasted two bits > > to support huge RV32-pfn :P). So I think it is time to merge these two bits > > before hardware supports GLOBAL. Reserve them for future! > > Two cases I can think of: > * vdso like things. They're user pages that can really be shared across address spaces (i.e. global). Kernels like L4 implement most systems calls similar to VDSO, so USER + GLOBAL is useful. Vdso is a user space mapping in linux, See: fs/binfmt_elf.c
static int load_elf_binary(struct linux_binprm *bprm) { ... #ifdef ARCH_HAS_SETUP_ADDITIONAL_PAGES retval = arch_setup_additional_pages(bprm, !!elf_interpreter); if (retval < 0) goto out; #endif /* ARCH_HAS_SETUP_ADDITIONAL_PAGES */
All linux archs use arch_setup_additional_pages for vdso mapping and every process has its own vdso mapping to the same pages.
I don't think vdso is a real scene for GLOBAL in PTE.
> * hypervisor without H-extension: This requires shadow page tables. Supervisor > pages are mapped to supervisor shadow pages. However these shadow pages cannot > be GLOBAL because they can't be shared between VMs. So !USER + !GLOBAL is useful. Hypervisor use 2-stages TLB translation in hardware and shadow page tables is for stage 2 translation. Shadow page tables care vmid not asid. If hardware don't support H-extension (MMU 2-stages translation), it's hard to accept for virtualization performance.
I don't think hypervisor is a real scene for GLOBAL in PTE.
Are there other scene for GLOBAL in PTE?
Best Regards Guo Ren
| |