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    Subject[PATCH V8 0/5] make mt7623 clock of hdmi stable
    Date
    From: Wangyan Wang <wangyan.wang@mediatek.com>

    V8 adopt maintainer's suggestion.
    Here is the change list between V7 & V8

    1. Make title more clear in patch commit message.

    2. To make MT2701 HDMI stable, TVDPLL should not be adjusted and
    it's the parent clock of HDMI phy, so HDMI phy could not adjust parent
    rate. there are 3 steps to make MT2701 HDMI stable.
    1). remove flag CLK_SET_RATE_PARENT for mt2701 hdmi phy to not propagate
    rate change to parent in "drm/mediatek: remove flag ...".
    2). Using new factor for tvdpll in mt2701 to match divider of DPI in
    mt2701 in "drm/mediatek: using new...".
    3). No change parent rate in round_rate() for mt2701 hdmi phy in
    "drm/mediatek: no change parent...".

    3. Recalculate the rate of this clock, by querying hardware to
    make implementation of recalc_rate() to match the definition.


    Wangyan Wang (5):
    drm/mediatek: remove flag CLK_SET_RATE_PARENT for mt2701 hdmi phy
    drm/mediatek: fix the rate and divder of hdmi phy for MT2701
    drm/mediatek: using new factor for tvdpll in MT2701
    drm/mediatek: no change parent rate in round_rate() for mt2701 hdmi phy
    drm/mediatek: make implementation of recalc_rate() to match the definition

    drivers/gpu/drm/mediatek/mtk_dpi.c | 8 ++---
    drivers/gpu/drm/mediatek/mtk_hdmi_phy.c | 35 +++---------------
    drivers/gpu/drm/mediatek/mtk_hdmi_phy.h | 5 +--
    drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c | 50 ++++++++++++++++++++++----
    drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c | 23 ++++++++++++
    5 files changed, 76 insertions(+), 45 deletions(-)

    --
    2.14.1

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