Messages in this thread Patch in this message | | | From | "Z.q. Hou" <> | Subject | [PATCHv5 05/20] PCI: mobiveil: Correct PCI base address in MEM/IO outbound windows | Date | Fri, 12 Apr 2019 08:35:42 +0000 |
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From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
It should get PCI base address from the 'ranges' property of DT node to setup MEM/IO outbound windows instead of always using zero.
Fixes: 9af6bcb11e12 ("PCI: mobiveil: Add Mobiveil PCIe Host Bridge IP driver") Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Minghuan Lian <Minghuan.Lian@nxp.com> Reviewed-by: Subrahmanya Lingappa <l.subrahmanya@mobiveil.co.in> --- V5: - Corrected and retouched the subject and changelog.
drivers/pci/controller/pcie-mobiveil.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/controller/pcie-mobiveil.c b/drivers/pci/controller/pcie-mobiveil.c index a0dd337c6214..8ff873023b5f 100644 --- a/drivers/pci/controller/pcie-mobiveil.c +++ b/drivers/pci/controller/pcie-mobiveil.c @@ -630,8 +630,9 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie) /* configure outbound translation window */ program_ob_windows(pcie, pcie->ob_wins_configured, - win->res->start, 0, type, - resource_size(win->res)); + win->res->start, + win->res->start - win->offset, + type, resource_size(win->res)); } /* setup MSI hardware registers */ -- 2.17.1
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