Messages in this thread | | | From | Stephen Boyd <> | Subject | Re: [PATCH] drivers: clk: zynqmp: Allow zero divisor value | Date | Thu, 11 Apr 2019 11:32:44 -0700 |
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Quoting Jolly Shah (2019-03-04 15:27:46) > From: Rajan Vaja <rajan.vaja@xilinx.com> > > Zero divider is valid and default for some of ZynqMP > clocks. Allow zero divisor when CLK_DIVIDER_ALLOW_ZERO > for the clock is set. > > Signed-off-by: Rajan Vaja <rajanv@xilinx.com> > Signed-off-by: Jolly Shah <jollys@xilinx.com> > ---
Applied to clk-next
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