Messages in this thread | | | From | Aisheng Dong <> | Subject | RE: [RFC 0/7] cpuidle: Add poking mechanism to support non-IPI wakeup | Date | Thu, 28 Mar 2019 11:27:53 +0000 |
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[...] > > > Anything that isn't visible to the GPC and requires the GIC > > > wake_request signal to behave as specified is broken by this erratum. > > > > I really wonder how a timer interrupt (a PPI, hence not routed through > > the GPC) can wake up the CPU in this case. It really feels like > > something like "program CNTV_CVAL_EL0 to expire at some later point; > > WFI" could result in the CPU going to a deep sleep state, and not > > wake-up at all. > > I guess it's broken in the same way. The downstream DT claims > "local-timer-stop" for the CPU sleep state and "arm,no-tick-in-suspend" > for the armv8-timer, which I guess is not the timer actually stopping in suspend, > but the CPU being unable to wake up due to the timer IRQ. > > > This would indicate that not only cpuidle is broken with this, but > > absolutely every interrupt that is not routed through the GPC. > > That's my understanding as well. Note that I have no NXP internal information > and can only infer from the published reference manual, errata notice and > downstream kernel. >
We will double check it. Thanks for the information.
Regards Dong Aisheng
> Regards, > Lucas
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