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SubjectRE: [PATCH v2 2/2] arm64: dts: imx8qxp: Add EDMA0/EDMA1 nodes
Date
> > > diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
> > > b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
> > > index 0cb939861a60..84c7c3eca1a1 100644
> > > --- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
> > > +++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
> > > @@ -182,6 +182,78 @@
> > > #clock-cells = <1>;
> > > };
> > >
> > > + edma0: dma-controller@591f0000 {
> > > + compatible = "fsl,imx8qxp-edma";
> > > + reg = <0x59200000 0x10000>, /* asrc0 pair A
> input req */
> > > + <0x59210000 0x10000>, /* asrc0 pair B
> input req */
> > > + <0x59220000 0x10000>, /* asrc0 pair C
> input req */
> > > + <0x59230000 0x10000>, /* asrc0 pair A
> output req */
> > > + <0x59240000 0x10000>, /* asrc0 pair B
> output req */
> > > + <0x59250000 0x10000>, /* asrc0 pair C
> output req */
> > > + <0x59260000 0x10000>, /* esai0 rx */
> > > + <0x59270000 0x10000>, /* esai0 tx */
> > > + <0x59280000 0x10000>, /* spdif0 rx */
> > > + <0x59290000 0x10000>, /* spdif0 tx */
> > > + <0x592c0000 0x10000>, /* sai0 rx */
> > > + <0x592d0000 0x10000>, /* sai0 tx */
> > > + <0x592e0000 0x10000>, /* sai1 rx */
> > > + <0x592f0000 0x10000>, /* sai1 tx */
> > > + #dma-cells = <3>;
> >
> > In binding doc, it's 2.
> > - #dma-cells : Must be <2>.
> > The 1st cell specifies the DMAMUX(0 for DMAMUX0 and 1 for
> DMAMUX1).
> > Specific request source can only be multiplexed by specific
> channels
> > group called DMAMUX.
> > The 2nd cell specifies the request source(slot) ID.
> >
> > Need update binding doc?
> >
> > > + shared-interrupt;
> >
> > Undocumented property?
> >
> > Checkpatch did not complain?
>
> Thanks Aisheng for this comment. I think we might need to delay a little bit
> this patch because (as pointed by Yibin) on i.MX8 QXP/QM we use
> fsl-edma-v3 which *is not* yet upstream.
>
> So, lets get back to adding the nodes after Yibin sends edma-v3 patches.
>

Yes, Yibin could check the comments when resending with edma driver support.

Regards
Dong Aisheng

> thanks,
> Daniel.
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