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SubjectRe: [PATCH v2] mfd: cros: Update EC protocol to match current EC code
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Hi Gwendal,

Unless my pwclient or patchwork is doing something weird I have some issues
trying to apply this patch. Could you check that is correctly formatted?

$ pwclient git-am 1055029

Applying patch #1055029 using u'git am'
Description: [v2] mfd: cros: Update EC protocol to match current EC code
Applying: mfd: cros: Update EC protocol to match current EC code
error: patch fragment without header at line 11: @@ -105,15 +120,24 @@
Patch failed at 0001 mfd: cros: Update EC protocol to match current EC code
hint: Use 'git am --show-current-patch' to see the failed patch
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To restore the original branch and stop patching, run "git am --abort".
'git am' failed with exit status 128

Also if I try to apply the patch directly I got:

$ git am --show-current-patch | patch -p1
patching file include/linux/mfd/cros_ec_commands.h
patch: **** malformed patch at line 5615: (8-bit) */

On 26/3/19 18:21, Gwendal Grignou wrote:
> Chromebook Embedded Controller protocol is defined in the kernel at
> cros_ec_commands.h.
> The source of trust for the EC protocol is at
> https://chromium.googlesource.com/chromiumos/platform/ec/+/master/include/ec_commands.h
>
> Only needed changes have been picked up from this file to the kernel
> include file leading to gaps between the upstream version and what the
> latest ECs can do.
>
> Fill the gaps to ease future integrations. Changes from the original
> files is header/footer for license and include files for alignment.
>
> Check this include file works on ChomeOS kernel 4.14 and 4.19 on eve.
>
> Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
> ---
> Changes in v2:
> - Replace 1 << with BIT()
> - Check checkpatch warning/errors are outside kernel scope.
> - Update .h with latest changes.
>
> include/linux/mfd/cros_ec_commands.h | 3723 +++++++++++++++++++++-----
> 1 file changed, 2992 insertions(+), 731 deletions(-)
>
> diff --git a/include/linux/mfd/cros_ec_commands.h
> b/include/linux/mfd/cros_ec_commands.h
> index fc91082d4c35..5c4764e3db6f 100644
> --- a/include/linux/mfd/cros_ec_commands.h
> +++ b/include/linux/mfd/cros_ec_commands.h

[snip]

> @@ -33,7 +46,7 @@
> #define EC_PROTO_VERSION 0x00000002
>
> /* Command version mask */
> -#define EC_VER_MASK(version) (1UL << (version))
> +#define EC_VER_MASK(version) BIT(version)
>
> /* I/O addresses for ACPI commands */
> #define EC_LPC_ADDR_ACPI_DATA 0x62
> @@ -59,13 +72,13 @@
> #define EC_HOST_CMD_REGION_SIZE 0x80
>
> /* EC command register bit functions */
> -#define EC_LPC_CMDR_DATA (1 << 0) /* Data ready for host to read */
> -#define EC_LPC_CMDR_PENDING (1 << 1) /* Write pending to EC */
> -#define EC_LPC_CMDR_BUSY (1 << 2) /* EC is busy processing a command */
> -#define EC_LPC_CMDR_CMD (1 << 3) /* Last host write was a command */
> -#define EC_LPC_CMDR_ACPI_BRST (1 << 4) /* Burst mode (not used) */
> -#define EC_LPC_CMDR_SCI (1 << 5) /* SCI event is pending */
> -#define EC_LPC_CMDR_SMI (1 << 6) /* SMI event is pending */
> +#define EC_LPC_CMDR_DATA BIT(0) /* Data ready for host to read */
> +#define EC_LPC_CMDR_PENDING BIT(1) /* Write pending to EC */
> +#define EC_LPC_CMDR_BUSY BIT(2) /* EC is busy processing a command */
> +#define EC_LPC_CMDR_CMD BIT(3) /* Last host write was a command */
> +#define EC_LPC_CMDR_ACPI_BRST BIT(4) /* Burst mode (not used) */
> +#define EC_LPC_CMDR_SCI BIT(5) /* SCI event is pending */
> +#define EC_LPC_CMDR_SMI BIT(6) /* SMI event is pending */
>
> #define EC_LPC_ADDR_MEMMAP 0x900
> #define EC_MEMMAP_SIZE 255 /* ACPI IO buffer max is 255 bytes */
> @@ -85,13 +98,15 @@
> /* Unused 0x28 - 0x2f */
> #define EC_MEMMAP_SWITCHES 0x30 /* 8 bits */
> /* Unused 0x31 - 0x33 */
> -#define EC_MEMMAP_HOST_EVENTS 0x34 /* 32 bits */
> -/* Reserve 0x38 - 0x3f for additional host event-related stuff */
> -/* Battery values are all 32 bits */
> +#define EC_MEMMAP_HOST_EVENTS 0x34 /* 64 bits */
> +/* Battery values are all 32 bits, unless otherwise noted. */
> #define EC_MEMMAP_BATT_VOLT 0x40 /* Battery Present Voltage */
> #define EC_MEMMAP_BATT_RATE 0x44 /* Battery Present Rate */
> #define EC_MEMMAP_BATT_CAP 0x48 /* Battery Remaining Capacity */
> -#define EC_MEMMAP_BATT_FLAG 0x4c /* Battery State, defined below */
> +#define EC_MEMMAP_BATT_FLAG 0x4c /* Battery State, see below (8-bit) */
> +#define EC_MEMMAP_BATT_COUNT 0x4d /* Battery Count (8-bit) */
> +#define EC_MEMMAP_BATT_INDEX 0x4e /* Current Battery Data Index
> (8-bit) */

Complains about this malformed line, but even after fix this I got other issues.

Thanks,
Enric

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