Messages in this thread | | | Date | Mon, 25 Mar 2019 12:32:18 +0100 | From | Borislav Petkov <> | Subject | Re: [PATCH 2/2] PM / arch: x86: MSR_IA32_ENERGY_PERF_BIAS sysfs interface |
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On Thu, Mar 21, 2019 at 11:20:17PM +0100, Rafael J. Wysocki wrote: > From: Rafael J. Wysocki <rafael.j.wysocki@intel.com> > > The Performance and Energy Bias Hint (EPB) is expected to be set by > user space through the generic MSR interface, but that interface is > not particularly nice and there are security concerns regarding it, > so it is not always available. > > For this reason, add a sysfs interface for reading and updating the > EPB, in the form of a new attribute, energy_perf_bias, located > under /sys/devices/system/cpu/cpu#/power/ for online CPUs that > support the EPB feature. > > Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> > --- > Documentation/ABI/testing/sysfs-devices-system-cpu | 18 ++++ > Documentation/admin-guide/pm/intel_epb.rst | 27 ++++++ > arch/x86/kernel/cpu/intel_epb.c | 93 ++++++++++++++++++++- > 3 files changed, 134 insertions(+), 4 deletions(-)
Acked-by: Borislav Petkov <bp@suse.de>
-- Regards/Gruss, Boris.
Good mailing practices for 400: avoid top-posting and trim the reply.
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