Messages in this thread Patch in this message | | | From | Jerome Brunet <> | Subject | [PATCH 4/4] clk: meson: g12a: add controller register init | Date | Mon, 25 Mar 2019 12:12:00 +0100 |
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Add the MPLL common register initial setting
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> --- drivers/clk/meson/g12a.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c index 6a01f8fd8114..493db74270ac 100644 --- a/drivers/clk/meson/g12a.c +++ b/drivers/clk/meson/g12a.c @@ -2361,10 +2361,16 @@ static struct clk_regmap *const g12a_clk_regmaps[] = { &g12a_mpll_50m, }; +static const struct reg_sequence g12a_init_regs[] = { + { .reg = HHI_MPLL_CNTL0, .def = 0x00000543 }, +}; + static const struct meson_eeclkc_data g12a_clkc_data = { .regmap_clks = g12a_clk_regmaps, .regmap_clk_num = ARRAY_SIZE(g12a_clk_regmaps), - .hw_onecell_data = &g12a_hw_onecell_data + .hw_onecell_data = &g12a_hw_onecell_data, + .init_regs = g12a_init_regs, + .init_count = ARRAY_SIZE(g12a_init_regs), }; static const struct of_device_id clkc_match_table[] = { -- 2.20.1
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