Messages in this thread | | | From | Andy Lutomirski <> | Date | Mon, 25 Mar 2019 17:43:54 -0700 | Subject | Re: [RESEND PATCH v6 00/12] x86: Enable FSGSBASE instructions |
| |
On Fri, Mar 15, 2019 at 1:07 PM Chang S. Bae <chang.seok.bae@intel.com> wrote: > > Updates from v5 [5]: > * Drop the new tain flag (TAINT_INSECURE) > * Cleanup copy_thread_tls(), some changelog, and unnecessary comments on > assembly macros > * Rearrange some helper updates appropriately (from patch 4 to 6)
I think this stuff is in generally decent shape, but I have two big broad comments:
What's the status of the stuff hpa was working on to make the behavior of modify_ldt() predictable?
Can we please have a test case that explicitly exercises the way that ptrace reads and writes the base registers?
| |