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    Subject[PATCH 5.0 067/238] spi: omap2-mcspi: Fix DMA and FIFO event trigger size mismatch
    Date
    5.0-stable review patch.  If anyone has any objections, please let me know.

    ------------------

    From: Vignesh R <vigneshr@ti.com>

    commit baf8b9f8d260c55a86405f70a384c29cda888476 upstream.

    Commit b682cffa3ac6 ("spi: omap2-mcspi: Set FIFO DMA trigger level to word length")
    broke SPI transfers where bits_per_word != 8. This is because of
    mimsatch between McSPI FIFO level event trigger size (SPI word length) and
    DMA request size(word length * maxburst). This leads to data
    corruption, lockup and errors like:

    spi1.0: EOW timed out

    Fix this by setting DMA maxburst size to 1 so that
    McSPI FIFO level event trigger size matches DMA request size.

    Fixes: b682cffa3ac6 ("spi: omap2-mcspi: Set FIFO DMA trigger level to word length")
    Cc: stable@vger.kernel.org
    Reported-by: David Lechner <david@lechnology.com>
    Tested-by: David Lechner <david@lechnology.com>
    Signed-off-by: Vignesh R <vigneshr@ti.com>
    Signed-off-by: Mark Brown <broonie@kernel.org>
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

    ---
    drivers/spi/spi-omap2-mcspi.c | 4 ++--
    1 file changed, 2 insertions(+), 2 deletions(-)

    --- a/drivers/spi/spi-omap2-mcspi.c
    +++ b/drivers/spi/spi-omap2-mcspi.c
    @@ -623,8 +623,8 @@ omap2_mcspi_txrx_dma(struct spi_device *
    cfg.dst_addr = cs->phys + OMAP2_MCSPI_TX0;
    cfg.src_addr_width = width;
    cfg.dst_addr_width = width;
    - cfg.src_maxburst = es;
    - cfg.dst_maxburst = es;
    + cfg.src_maxburst = 1;
    + cfg.dst_maxburst = 1;

    rx = xfer->rx_buf;
    tx = xfer->tx_buf;

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