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    Subject[PATCH 4.14 091/183] clocksource/drivers/exynos_mct: Move one-shot check from tick clear to ISR
    Date
    4.14-stable review patch.  If anyone has any objections, please let me know.

    ------------------

    From: Stuart Menefy <stuart.menefy@mathembedded.com>

    commit a5719a40aef956ba704f2aa1c7b977224d60fa96 upstream.

    When a timer tick occurs and the clock is in one-shot mode, the timer
    needs to be stopped to prevent it triggering subsequent interrupts.
    Currently this code is in exynos4_mct_tick_clear(), but as it is
    only needed when an ISR occurs move it into exynos4_mct_tick_isr(),
    leaving exynos4_mct_tick_clear() just doing what its name suggests it
    should.

    Signed-off-by: Stuart Menefy <stuart.menefy@mathembedded.com>
    Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
    Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
    Cc: stable@vger.kernel.org # v4.3+
    Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

    ---
    drivers/clocksource/exynos_mct.c | 22 +++++++++++-----------
    1 file changed, 11 insertions(+), 11 deletions(-)

    --- a/drivers/clocksource/exynos_mct.c
    +++ b/drivers/clocksource/exynos_mct.c
    @@ -388,6 +388,13 @@ static void exynos4_mct_tick_start(unsig
    exynos4_mct_write(tmp, mevt->base + MCT_L_TCON_OFFSET);
    }

    +static void exynos4_mct_tick_clear(struct mct_clock_event_device *mevt)
    +{
    + /* Clear the MCT tick interrupt */
    + if (readl_relaxed(reg_base + mevt->base + MCT_L_INT_CSTAT_OFFSET) & 1)
    + exynos4_mct_write(0x1, mevt->base + MCT_L_INT_CSTAT_OFFSET);
    +}
    +
    static int exynos4_tick_set_next_event(unsigned long cycles,
    struct clock_event_device *evt)
    {
    @@ -420,8 +427,11 @@ static int set_state_periodic(struct clo
    return 0;
    }

    -static void exynos4_mct_tick_clear(struct mct_clock_event_device *mevt)
    +static irqreturn_t exynos4_mct_tick_isr(int irq, void *dev_id)
    {
    + struct mct_clock_event_device *mevt = dev_id;
    + struct clock_event_device *evt = &mevt->evt;
    +
    /*
    * This is for supporting oneshot mode.
    * Mct would generate interrupt periodically
    @@ -430,16 +440,6 @@ static void exynos4_mct_tick_clear(struc
    if (!clockevent_state_periodic(&mevt->evt))
    exynos4_mct_tick_stop(mevt);

    - /* Clear the MCT tick interrupt */
    - if (readl_relaxed(reg_base + mevt->base + MCT_L_INT_CSTAT_OFFSET) & 1)
    - exynos4_mct_write(0x1, mevt->base + MCT_L_INT_CSTAT_OFFSET);
    -}
    -
    -static irqreturn_t exynos4_mct_tick_isr(int irq, void *dev_id)
    -{
    - struct mct_clock_event_device *mevt = dev_id;
    - struct clock_event_device *evt = &mevt->evt;
    -
    exynos4_mct_tick_clear(mevt);

    evt->event_handler(evt);

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