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SubjectRe: [PATCH] crypto: caam - limit AXI pipeline to a depth of 1
Date
On 3/22/2019 3:39 PM, Iuliana Prodan wrote:
> Some i.MX6 devices (imx6D, imx6Q, imx6DL, imx6S, imx6DP and imx6DQ) have
> an issue wherein AXI bus transactions may not occur in the correct order.
> This isn't a problem running single descriptors, but can be if running
> multiple concurrent descriptors. Reworking the CAAM driver to throttle
> to single requests is impractical, so this patch limits the AXI pipeline
> to a depth of one (from a default of 4) to preclude this situation from
> occurring.
> This patch applies to known affected platforms.
>
> Signed-off-by: Radu Solea <radu.solea@nxp.com>
> Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>

Thanks,
Horia

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