Messages in this thread | | | Date | Tue, 19 Mar 2019 15:53:09 +0100 | From | Peter Zijlstra <> | Subject | Re: [PATCH 05/22] perf/x86: Support constraint ranges |
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On Mon, Mar 18, 2019 at 02:41:27PM -0700, kan.liang@linux.intel.com wrote: > From: Andi Kleen <ak@linux.intel.com> > > Icelake extended the general counters to 8, even when SMT is enabled. > However only a (large) subset of the events can be used on all 8 > counters. > > The events that can or cannot be used on all counters are organized > in ranges. > > We need a lot of scheduler constraints to handle all this. > > To avoid blowing up the tables add event code ranges to the constraint > tables, and a new inline function to match them. > > The changes costs ~2k text size according to 0day report.
Where?! there isn't much code here.
> Signed-off-by: Andi Kleen <ak@linux.intel.com> > Signed-off-by: Kan Liang <kan.liang@linux.intel.com> > --- > arch/x86/events/intel/core.c | 2 +- > arch/x86/events/intel/ds.c | 2 +- > arch/x86/events/perf_event.h | 34 ++++++++++++++++++++++++++++++++++ > 3 files changed, 36 insertions(+), 2 deletions(-) > > diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c > index a964b9832b0c..8486ab87f8f8 100644 > --- a/arch/x86/events/intel/core.c > +++ b/arch/x86/events/intel/core.c > @@ -2655,7 +2655,7 @@ x86_get_event_constraints(struct cpu_hw_events *cpuc, int idx, > > if (x86_pmu.event_constraints) { > for_each_event_constraint(c, x86_pmu.event_constraints) { > - if ((event->hw.config & c->cmask) == c->code) { > + if (constraint_match(c, event->hw.config)) { > event->hw.flags |= c->flags; > return c; > } > diff --git a/arch/x86/events/intel/ds.c b/arch/x86/events/intel/ds.c > index 974284c5ed6c..30370fb93e21 100644 > --- a/arch/x86/events/intel/ds.c > +++ b/arch/x86/events/intel/ds.c > @@ -858,7 +858,7 @@ struct event_constraint *intel_pebs_constraints(struct perf_event *event) > > if (x86_pmu.pebs_constraints) { > for_each_event_constraint(c, x86_pmu.pebs_constraints) { > - if ((event->hw.config & c->cmask) == c->code) { > + if (constraint_match(c, event->hw.config)) { > event->hw.flags |= c->flags; > return c; > } > @@ -71,6 +72,12 @@ struct event_constraint { > #define PERF_X86_EVENT_AUTO_RELOAD 0x0400 /* use PEBS auto-reload */ > #define PERF_X86_EVENT_LARGE_PEBS 0x0800 /* use large PEBS */ > > +static inline bool constraint_match(struct event_constraint *c, u64 ecode) > +{ > + ecode &= c->cmask; > + return ecode == c->code || > + (c->range_end && ecode >= c->code && ecode <= c->range_end); > +} > > struct amd_nb { > int nb_id; /* NorthBridge id */
That's all the code, how does that add up to 2k ?
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