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SubjectRe: [PATCH RESEND] clk: imx5: Fix i.MX50 clock registers
On Tue, Mar 19, 2019 at 02:16:51PM +0000, Aisheng Dong wrote:
> > From: Jonathan Neuschäfer [mailto:j.neuschaefer@gmx.net]
> >
> > There are a few differences between the i.MX50 clock tree and those of
> > i.MX51 and i.MX53 that are not yet handled in clk-imx51-imx53.c.
> > This patch handles the following differences:
> >
> > - i.MX50 does not have a periph_apm clock. Instead, the main bus clock
> > (a.k.a. periph_clk) comes directly from a MUX between pll1_sw,
> > pll2_sw, pll3_sw, and lp_apm.
> > - The MUX bits for esdhc_{a,c,d}_sel are shifted by one bit within
> > CSCMR1.
> >
>
> Can you please split them into two patches?
> Otherwise, the fix seems good to me.

Ok, I'll do that.


Jonathan Neuschäfer
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