Messages in this thread Patch in this message | | | Subject | [PATCH v2] PCI: qcom: Use default config space read function | From | Marc Gonzalez <> | Date | Wed, 13 Mar 2019 12:45:38 +0100 |
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We don't need to fudge the device class in qcom_pcie_rd_own_conf() because dw_pcie_setup_rc() already does the right thing:
/* Program correct class for RC */ dw_pcie_wr_own_conf(pp, PCI_CLASS_DEVICE, 2, PCI_CLASS_BRIDGE_PCI);
Signed-off-by: Marc Gonzalez <marc.w.gonzalez@free.fr> --- Changes from v1 to v2: Completely drop qcom_pcie_rd_own_conf Srinivas, could you test this patch on apq/ipq8064? --- drivers/pci/controller/dwc/pcie-qcom.c | 17 ----------------- 1 file changed, 17 deletions(-)
diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c index 3de5510fd3d5..d0c5c7616b3e 100644 --- a/drivers/pci/controller/dwc/pcie-qcom.c +++ b/drivers/pci/controller/dwc/pcie-qcom.c @@ -1131,25 +1131,8 @@ static int qcom_pcie_host_init(struct pcie_port *pp) return ret; } -static int qcom_pcie_rd_own_conf(struct pcie_port *pp, int where, int size, - u32 *val) -{ - struct dw_pcie *pci = to_dw_pcie_from_pp(pp); - - /* the device class is not reported correctly from the register */ - if (where == PCI_CLASS_REVISION && size == 4) { - *val = readl(pci->dbi_base + PCI_CLASS_REVISION); - *val &= 0xff; /* keep revision id */ - *val |= PCI_CLASS_BRIDGE_PCI << 16; - return PCIBIOS_SUCCESSFUL; - } - - return dw_pcie_read(pci->dbi_base + where, size, val); -} - static const struct dw_pcie_host_ops qcom_pcie_dw_ops = { .host_init = qcom_pcie_host_init, - .rd_own_conf = qcom_pcie_rd_own_conf, }; /* Qcom IP rev.: 2.1.0 Synopsys IP rev.: 4.01a */ -- 2.17.1
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