Messages in this thread | | | From | Rob Herring <> | Date | Tue, 12 Mar 2019 07:28:00 -0500 | Subject | Re: [PATCH 4/4] MIPS: Loongson32: dts: add ls1b & ls1c |
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On Tue, Mar 12, 2019 at 4:16 AM Jiaxun Yang <jiaxun.yang@flygoat.com> wrote: > > Add devicetree skeleton for ls1b and ls1c > > Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> > --- > arch/mips/boot/dts/loongson/Makefile | 6 ++ > arch/mips/boot/dts/loongson/ls1b.dts | 21 +++++ > arch/mips/boot/dts/loongson/ls1c.dts | 25 ++++++ > arch/mips/boot/dts/loongson/ls1x.dtsi | 117 ++++++++++++++++++++++++++ > 4 files changed, 169 insertions(+) > create mode 100644 arch/mips/boot/dts/loongson/Makefile > create mode 100644 arch/mips/boot/dts/loongson/ls1b.dts > create mode 100644 arch/mips/boot/dts/loongson/ls1c.dts > create mode 100644 arch/mips/boot/dts/loongson/ls1x.dtsi > > diff --git a/arch/mips/boot/dts/loongson/Makefile b/arch/mips/boot/dts/loongson/Makefile > new file mode 100644 > index 000000000000..447801568f33 > --- /dev/null > +++ b/arch/mips/boot/dts/loongson/Makefile > @@ -0,0 +1,6 @@ > +# SPDX-License-Identifier: GPL-2.0 > +dtb-$(CONFIG_LOONGSON1_LS1B) += ls1b.dtb > + > +dtb-$(CONFIG_LOONGSON1_LS1B) += ls1c.dtb > + > +obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y)) > diff --git a/arch/mips/boot/dts/loongson/ls1b.dts b/arch/mips/boot/dts/loongson/ls1b.dts > new file mode 100644 > index 000000000000..6d40dc502acf > --- /dev/null > +++ b/arch/mips/boot/dts/loongson/ls1b.dts > @@ -0,0 +1,21 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Copyright (c) 2019 Jiaxun Yang <jiaxun.yang@flygoat.com> > + */ > + > +/dts-v1/; > +#include <ls1x.dtsi> > + > +/ { > + model = "Loongson LS1B"; > + compatible = "loongson,ls1b";
Documented?
> + > +}; > + > +&ehci0 { > + status = "okay"; > +}; > + > +&ohci0 { > + status = "okay"; > +}; > \ No newline at end of file
Fix this.
> diff --git a/arch/mips/boot/dts/loongson/ls1c.dts b/arch/mips/boot/dts/loongson/ls1c.dts > new file mode 100644 > index 000000000000..778d205a586e > --- /dev/null > +++ b/arch/mips/boot/dts/loongson/ls1c.dts > @@ -0,0 +1,25 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Copyright (c) 2019 Jiaxun Yang <jiaxun.yang@flygoat.com> > + */ > + > +/dts-v1/; > +#include <ls1x.dtsi> > + > +/ { > + model = "Loongson LS1C300A"; > + compatible = "loongson,ls1c300a"; > + > +}; > + > +&platintc4 { > + status = "okay"; > +}; > + > +&ehci0 { > + status = "okay"; > +}; > + > +&ohci0 { > + status = "okay"; > +}; > \ No newline at end of file > diff --git a/arch/mips/boot/dts/loongson/ls1x.dtsi b/arch/mips/boot/dts/loongson/ls1x.dtsi > new file mode 100644 > index 000000000000..f808e4328fd8 > --- /dev/null > +++ b/arch/mips/boot/dts/loongson/ls1x.dtsi > @@ -0,0 +1,117 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Copyright (c) 2019 Jiaxun Yang <jiaxun.yang@flygoat.com> > + */ > + > +/dts-v1/; > +#include <dt-bindings/interrupt-controller/irq.h> > + > + > +/ { > + #address-cells = <1>; > + #size-cells = <1>; > + > + cpus { > + #address-cells = <1>; > + #size-cells = <0>; > + > + cpu@0 { > + device_type = "cpu"; > + reg = <0>;
Needs a (documented) compatible string.
> + }; > + }; > + > + cpu_intc: interrupt-controller { > + #address-cells = <0>; > + compatible = "mti,cpu-interrupt-controller"; > + > + interrupt-controller; > + #interrupt-cells = <1>; > + }; > + > + soc { > + #address-cells = <1>; > + #size-cells = <1>; > + > + compatible = "simple-bus"; > + ranges; > + > + > + platintc0: interrupt-controller@1fd01040 { > + compatible = "loongson,ls1x-intc"; > + reg = <0x1fd01040 0x18>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + > + interrupt-parent = <&cpu_intc>; > + interrupts = <2>; > + }; > + > + platintc1: interrupt-controller@1fd01058 { > + compatible = "loongson,ls1x-intc"; > + reg = <0x1fd01058 0x18>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + > + interrupt-parent = <&cpu_intc>; > + interrupts = <3>; > + }; > + > + platintc2: interrupt-controller@1fd01070 { > + compatible = "loongson,ls1x-intc"; > + reg = <0x1fd01070 0x18>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + > + interrupt-parent = <&cpu_intc>; > + interrupts = <4>; > + }; > + > + platintc3: interrupt-controller@1fd01088 { > + compatible = "loongson,ls1x-intc"; > + reg = <0x1fd01088 0x18>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + > + interrupt-parent = <&cpu_intc>; > + interrupts = <5>; > + }; > + > + platintc4: interrupt-controller@1fd010a0 { > + compatible = "loongson,ls1x-intc"; > + reg = <0x1fd010a0 0x18>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + > + interrupt-parent = <&cpu_intc>; > + interrupts = <6>; > + > + status = "disabled";
Some indentation problem.
> + }; > + > + ehci0: usb@1fe20000 { > + compatible = "generic-ehci";
It would be better to add a chip specific compatible here. Most all USB controllers have some quirks.
> + reg = <0x1fe20000 0x100>; > + interrupt-parent = <&platintc1>; > + interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; > + > + status = "disabled"; > + }; > + > + ohci0: usb@1fe28000 { > + compatible = "generic-ohci"; > + reg = <0x1fe28000 0x100>; > + interrupt-parent = <&platintc1>; > + interrupts = <1 IRQ_TYPE_LEVEL_HIGH>; > + > + status = "disabled"; > + };
Don't you need a serial port or something for a console?
> + > + }; > +}; > +\ 文件尾没有换行符 > -- > 2.20.1 >
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