Messages in this thread | | | Date | Fri, 1 Mar 2019 21:54:21 +0000 | From | Christopher Lameter <> | Subject | Re: [PATCH] percpu/module resevation: change resevation size iff X86_VSMP is set |
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On Fri, 1 Mar 2019, Barret Rhoden wrote:
> I'm not familiar with VSMP - how bad is it to use L1 cache alignment instead > of 4K page alignment? Maybe some structures can use the smaller alignment? > Or maybe have VSMP require SRCU-using modules to be built-in?
It is very expensive. VMSP exchanges 4K segments via RDMA between servers to build a large address space and run a kernel in the large address space. Using smaller segments can cause a lot of "cacheline" bouncing (meaning transfers of 4K segments back and forth between servers).
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