Messages in this thread | | | From | Yash Shah <> | Date | Thu, 7 Feb 2019 13:54:37 +0530 | Subject | Re: [PATCH v5 2/2] pwm: sifive: Add a driver for SiFive SoC PWM |
| |
On Wed, Feb 6, 2019 at 6:14 PM Thierry Reding <thierry.reding@gmail.com> wrote: > > On Tue, Jan 29, 2019 at 05:13:19PM +0530, Yash Shah wrote: > [...] > > diff --git a/drivers/pwm/pwm-sifive.c b/drivers/pwm/pwm-sifive.c > [...] > > +static void pwm_sifive_update_clock(struct pwm_sifive_ddata *pwm, > > + unsigned long rate) > > +{ > > + /* (1 << (16+scale)) * 10^9/rate = real_period */ > > + unsigned long scale_pow = > > + (pwm->approx_period * (u64)rate) / NSEC_PER_SEC; > > I think you need another div64_ul() for this one to fix the linker error > that the 0-day builder was pointing out.
Yes, will fix this. Thanks for pointing it out.
> > Thierry
| |