Messages in this thread Patch in this message | | | From | Simon Horman <> | Subject | [PATCH v4 4/5] clk: renesas: r8a77990: Add Z2 clock | Date | Thu, 7 Feb 2019 14:35:49 +0100 |
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From: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Adds support for R-Car E3 (r8a77990) Z2 clock.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> [simon: reworked changelog; rebased] Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> --- v3: [Simon Horman] - Pass new offset parameter
v2: [Simon Horman] - Initialise as programmable clock
v1: [Simon Horman] - Initialise as fixed clock
v0: [Takeshi Kihara] - Initialise as programmable clock --- drivers/clk/renesas/r8a77990-cpg-mssr.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/drivers/clk/renesas/r8a77990-cpg-mssr.c b/drivers/clk/renesas/r8a77990-cpg-mssr.c index 9a278c75c918..072e4bde6fff 100644 --- a/drivers/clk/renesas/r8a77990-cpg-mssr.c +++ b/drivers/clk/renesas/r8a77990-cpg-mssr.c @@ -81,6 +81,7 @@ static const struct cpg_core_clk r8a77990_core_clks[] __initconst = { /* Core Clock Outputs */ DEF_FIXED("za2", R8A77990_CLK_ZA2, CLK_PLL0D24, 1, 1), DEF_FIXED("za8", R8A77990_CLK_ZA8, CLK_PLL0D8, 1, 1), + DEF_GEN3_Z("z2", R8A77990_CLK_Z2, CLK_TYPE_GEN3_Z2, CLK_PLL0, 4, 8), DEF_FIXED("ztr", R8A77990_CLK_ZTR, CLK_PLL1, 6, 1), DEF_FIXED("zt", R8A77990_CLK_ZT, CLK_PLL1, 4, 1), DEF_FIXED("zx", R8A77990_CLK_ZX, CLK_PLL1, 3, 1), -- 2.11.0
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