Messages in this thread | | | Date | Sun, 17 Feb 2019 15:34:13 -0800 (PST) | Subject | Re: [PATCH net-next] net: phy: marvell10g: Don't explicitly set Pause and Asym_Pause | From | David Miller <> |
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From: Maxime Chevallier <maxime.chevallier@bootlin.com> Date: Fri, 15 Feb 2019 09:33:47 +0100
> The PHY core expects PHY drivers not to set Pause and Asym_Pause bits, > unless the driver only wants to specify one of them due to HW > limitation. In the case of the Marvell10g driver, we don't need to set > them. > > Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> > Suggested-by: Andrew Lunn <andrew@lunn.ch>
Applied, thanks.
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