Messages in this thread | | | Subject | Re: [PATCH 2/2] soc: imx8: Add cpufreq registering and speed grading check for i.MX8MQ | From | Lucas Stach <> | Date | Tue, 12 Feb 2019 13:44:22 +0100 |
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Hi Abel,
Am Dienstag, den 12.02.2019, 12:21 +0000 schrieb Abel Vesa: > From: Anson Huang <Anson.Huang@nxp.com> > > Register cpu-freq platform driver for i.MX8. > i.MX8MQ has different parts like consumer, industrial and auto etc., > different parts have different cpufreq set-points, this patch adds > fuse check to select correct cpufreq set-points for each part. The > default dtb has all set-points available, then kernel will check fuse > to disable those unused set-points, definition as below: > > OCOTP offset 0x440, bit [7:6] > > '00' - Consumer 0C to 95C > '01' - Ext. Consumer -20C to 105C > '10' - Industrial -40C to 105C > '11' - Automotive -40C to 125C
Shouldn't this read 0x440 [9:8] (SPEED_GRADING) instead? According to the RM those 2 bits directly encode the maximum ARM core frequency, so we don't need to guess from the target market.
Regards, Lucas
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