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    Subject[PATCH v4 00/12] Mediatek MT8183 clock and scpsys support
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    This series is based on v5.0-rc1 and most of changes are extracted from series below
    (clock/scpsys common changes for both MT8183 & MT6765)
    https://patchwork.kernel.org/patch/10528495/
    (clock support of MT8183)
    https://patchwork.kernel.org/patch/10549891/

    The whole series is composed of
    clock common changes for both MT8183 & MT6765 (PATCH 1-3),
    scpsys common changes for both MT8183 & MT6765 (PATCH 4),
    clock support of MT8183 (PATCH 5-8),
    scpsys support of MT8183 (PATCH 9-11) and
    resend a clock patch long time ago(PTACH 12).

    change sinve v3:
    - add fix tag.
    - small change of mtk_clk_mux data structure.
    - use of_property_for_each_string to iterate dependent subsys clock of power domain.
    - document critical clocks.
    - reduce some clock register error log.
    - few coding style fix.

    change sinve v2:
    - refine for implementation consistency of mtk clk mux.
    - separate the onoff API into enable/disable API for mtk scpsys.
    - resend a patch about PLL rate changing.

    changes since v1:
    - refine for better code quality.
    - some minor bug fix of clock part, like incorrect control address
    and missing clocks.


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