Messages in this thread | | | Subject | Re: [PATCH 2/2] PCI: uniphier: Add checking whether PERST# is deasserted | From | Kishon Vijay Abraham I <> | Date | Fri, 6 Dec 2019 12:28:29 +0530 |
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Hi,
On 04/12/19 3:35 pm, Kunihiko Hayashi wrote: > On Fri, 22 Nov 2019 20:53:16 +0900 <hayashi.kunihiko@socionext.com> wrote: > >> Hello Lorenzo, >> >> On Thu, 21 Nov 2019 16:47:05 +0000 <lorenzo.pieralisi@arm.com> wrote: >> >>> On Fri, Nov 08, 2019 at 04:30:27PM +0900, Kunihiko Hayashi wrote: >>>>> However, If I understand correctly, doesn't your solution only work some >>>>> of the time? What happens if you boot both machines at the same time, >>>>> and PERST# isn't asserted prior to the kernel booting? >>>> >>>> I think it contains an annoying problem. >>>> >>>> If PERST# isn't toggled prior to the kernel booting, PERST# remains asserted >>>> and the RC driver can't access PCI bus. >>>> >>>> As a result, this patch works and deasserts PERST# (and EP configuration will >>>> be lost). So boot sequence needs to include deasserting PERST#. >>> >>> I am sorry but I have lost you. Can you explain to us why checking >>> that PERST# is deasserted guarantees you that: >>> >>> - The EP has bootstrapped >>> - It is safe not to toggle it again (and also skip >>> uniphier_pcie_ltssm_enable()) >>> >>> Please provide details of the HW configuration so that we understand >>> what's actually supposed to happen and why this patch fixes the >>> issue you are facing. >> >> I tried to connect between the following boards, and do pci-epf-test: >> - "RC board": UniPhier ld20 board that has DWC RC controller >> - "EP board": UniPhier legacy board that has DWC EP controller >> >> This EP has power-on-state configuration, but it's necessary to set >> class ID, BAR sizes, etc. after starting up. >> >> In case of that starting up RC board before EP board, the RC driver >> can't establish link. So we need to boot EP board first. > > At that point, I've considered why RC can't establish link, > and found that the waitng time was too short. > > - EP/RC: power on both boards > > - RC: start up the kernel on RC board > > - RC: wait for link up (long time enough) > > - EP: start up the kernel on EP board > > - EP: configurate pci-epf-test > > When the endpoint configuration is done and the EP driver enables LTSSM, > the RC driver will quit from waiting for link up. > > Currently DWC RC driver calls dwc_pcie_wait_for_link(), however, > the function tries to link up 10 times only, that is defined > as LINK_WAIT_MAX_RETRIES in pcie-designware.h, it's too short > to configurate the endpoint. > > Now the patch to bypass PERST# is not necessary. > > Instead for DWC RC drivers, I think that the number of retries > should be changed according to the usage. > And the same issue remains with other RC drivers.
If EP is configured using Linux, then PERST# cannot be used as it's difficult to boot linux and initialize EP within the specified time interval. Can't you prevent PERST from being propagated at all?
Thanks Kishon
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